Optical Circuit Switches Market (2026-2036)

An optical circuit switch establishes a light path between fibres without converting the signal to electrical form, so it carries no packet processing, imposes no rate or protocol dependency and consumes power that is largely independent of the bandwidth passing through it. It is closer in function to an automated patch panel than to a packet switch. The growth of this market is driven by the cost and power of electrical switching at the capacities artificial intelligence fabrics require, and by the value of being able to change a network topology without changing its cabling.

The critical distinction in assessing this market is between what has been proven in production and what the industry is currently excited about, because they are not the same product. The deployment that validated the technology reconfigures a topology between jobs or on failure, which millisecond-class switching handles comfortably. The workloads now driving interest change their communication patterns within a few milliseconds, which millisecond-class switching cannot follow. Those two requirements are met by different technologies at different maturities, and treating the first as evidence for the second is the standard error in this category. This report therefore forecasts the two reconfiguration classes separately and states which evidence supports which. The distinction also determines which suppliers are credible for which duty.

An optical circuit switch routes light from an input fibre to an output fibre and does nothing else. It performs no optical to electrical conversion, inspects no headers, buffers nothing and makes no forwarding decisions, which means it is transparent to line rate, modulation format and protocol, and its power draw does not rise when the traffic through it doubles. Those properties are the entire commercial case, because an electrical packet switch must be replaced when line rates advance and consumes power in proportion to the bandwidth it handles. The corresponding limitation is equally fundamental, since a circuit switch cannot multiplex statistically and therefore only serves traffic whose pattern is known and held long enough to be worth establishing a path for.

That limitation explains why the technology has succeeded where it has. The paper Jupiter Evolving, Transforming Google Datacenter Network via Optical Circuit Switches and Software-Defined Networking, published in the Proceedings of ACM SIGCOMM 2022, reports the replacement of a Clos topology with a direct-connect topology among machine aggregation blocks, built on a datacenter interconnection layer using MEMS-based optical circuit switches that permits dynamic topology reconfiguration. Across the decade of Jupiter evolution the authors report five times higher speed and capacity, a 30 percent reduction in capital expenditure, a 41 percent reduction in power and three times faster fabric reconfiguration than the preceding Clos fabrics that used patch-panel interconnects, achieved with incremental deployment and technology refresh while serving live production traffic. The same work reports that 60 percent of traffic takes a direct path between aggregation blocks with the remainder transiting one additional block, giving an average block-level path length of 1.4, and that combining traffic engineering with topology engineering on direct-connect fabrics achieves throughput similar to Clos fabrics for production traffic patterns.

Those figures are the strongest evidence available for this technology and they deserve to be read precisely. The reported gains come from replacing a Clos fabric with a direct-connect topology that an optical interconnection layer makes reconfigurable, not from fast switching. The reconfiguration being compared is against patch-panel interconnects, which is to say against manual recabling, and the benefit is that a topology can be changed without sending technicians to move fibres. This is a genuine and large commercial achievement, and it is achieved with MEMS switching in the millisecond class.

The difficulty is that the workloads generating current interest in this category have a different requirement. An Open Compute Project white paper on fast switching optical circuit switching, dated 19 October 2026 and contributed by authors from iPronics, Lumentum, Ciena, Carnegie Mellon University and AMD, Lumotive, Intel and Triple-Stone Technology, argues that end-to-end reconfiguration latency rather than the speed of the optical switch alone determines real-world performance, and calls for technology-neutral benchmarking. The paper defines fast switching as sub-millisecond reconfiguration, typically in the range of 10 to 1,000 microseconds, and notes that millisecond-class systems using MEMS, piezo or liquid crystal actuation are used for job-level or slower reconfiguration. The paper states that many artificial intelligence communication patterns change within a few milliseconds, so millisecond-class optical circuit switching cannot keep pace, and identifies failure recovery, collective-aware topology adaptation, accelerator topology reconfiguration and mixture-of-experts all-to-all traffic as the applications concerned, citing model FLOPs utilisation levels of 38 to 43 percent. It notes that integrated photonics and metasurface approaches are solid-state while MEMS designs have moving parts, that phase-change devices are cycle-limited at between 10 and 10,000 cycles against 10 to the ninth and 10 to the tenth cycles demonstrated for standalone MEMS, and that many fast technologies are presently available only at relatively small radix, with the proposed PULSE architecture scaling to 4,096 nodes.

The implication is uncomfortable for the conventional narrative. The configuration proven in production is job-level reconfiguration, which is effectively an automated patch panel operating between workloads or on failure. The application now attracting attention is topology adaptation within a running collective, where communication patterns shift faster than a millisecond-class device can respond. Those are different products built on different physics, and the commercial success of the first is weak evidence for the second. A supplier presenting deployment results from job-level switching as validation of a fast switching proposition is conflating two markets.

The technology options for fast switching are numerous and their switching speeds are well characterised. The switching times the paper records are approximately 50 microseconds for metasurface free-space devices, 10 to 100 microseconds for thermo-optic integrated photonics, 1 to 20 microseconds for integrated photonic MEMS, nanoseconds to microseconds for electro-optic devices using carrier injection with nanoseconds for electro-absorption and sub-nanosecond for Pockels effect devices, nanoseconds for semiconductor optical amplifier switches, and from nanoseconds for amorphization to milliseconds for crystallization in phase-change materials. Rotor free-space devices at 10 microseconds to 1 millisecond are excluded from the analysis. Read in isolation, that table suggests the problem is solved several times over, since nanosecond and sub-nanosecond devices exist. The paper is explicit that this reading is wrong, and its central argument is the most useful thing published on this market.

On the end-to-end argument the paper identifies scheduling, control, switch settling, transceiver lock, synchronisation and host readiness as the components of reconfiguration latency, sets a target of establishing an end-to-end path across an arbitrary multi-chassis topology in roughly the time a single optical circuit switch takes to configure, and states that transceiver relocking must fall from hundreds of microseconds or milliseconds to nanoseconds through burst-mode receivers and calibration. It recommends a staged path of pipelining scheduling, adopting faster switches, reducing receiver lock time and then moving actuation into synchronised hardware, and calls on the community to develop benchmarking methods and co-design standards. It also notes that integrated photonic loss scales strongly with radix while free-space loss is broadly independent of radix, with radix and insertion loss placed explicitly out of scope. The conclusion a buyer or an investor should draw is that the bottleneck in fast optical circuit switching is not the switch. A device that reconfigures in one microsecond, installed in a system whose transceivers require hundreds of microseconds to reacquire lock, delivers a system that reconfigures in hundreds of microseconds. The component that must improve by three orders of magnitude is the receiver, not the switch, and a vendor selling switching speed into an unmodified optical front end is selling a specification the system cannot use.

Two further constraints narrow the field more than the speed comparison suggests. The first is endurance. Phase-change devices are cycle-limited at between 10 and 10,000 cycles, against 10 to the ninth and 10 to the tenth cycles demonstrated for standalone MEMS, and a switch reconfiguring every few milliseconds would exhaust ten thousand cycles within a minute of operation. Endurance therefore disqualifies that family for the fast switching duty irrespective of how quickly it switches, which the speed tables alone would conceal. The second is radix. Many fast technologies are presently available only at relatively small port counts, and integrated photonic loss scales strongly with radix while free-space loss is broadly independent of it, so the combination of fast, solid-state and high port count is the one nobody currently offers.

A note on the economics cited in support of this market is warranted. The Open Compute Project paper cites model FLOPs utilisation of 38 to 43 percent and presents a five hundred million dollar figure as an illustration only, stating explicitly that it is not a recoverable loss. That qualification matters, because the gap between theoretical and achieved utilisation has many causes besides network topology, including memory bandwidth, kernel efficiency, scheduling and data loading, and attributing it to switching would overstate the addressable value of this category substantially. This report uses the utilisation figures as context for why the problem is being worked on and does not treat the illustrative figure as market value.

The structure of supply is the final distinctive feature. The organisation with by far the largest proven deployment designed and built its own switches, which raises the question of what remains for merchant suppliers. The answer visible in the contributor list of the Open Compute Project work is that the merchant opportunity is being constructed collaboratively, with component makers, systems vendors, a processor manufacturer and academic groups working on benchmarking methods and co-design standards rather than competing products. That is characteristic of a category in which the architecture is not yet settled, and it means early revenue is concentrated in development programmes rather than in volume supply.