Probabilistic computing Market Outlook 2026–2036: Growth Drivers, Key Companies, Strategic Developments & Adoption Forecast — A Meticulous Next™ Foresight Brief

This Meticulous Next™ brief examines probabilistic computing, hardware that uses random fluctuations as a resource to draw samples from a probability distribution or to search for the best answer to an optimisation problem. It tests how far probabilistic bits, Ising machines and thermodynamic sampling chips move from laboratories to production data centres by 2036, and what that means for chipmakers, cloud providers, research labs and the industries that face hard optimisation and uncertainty problems.

Start-ups showed hardware in 2025. Extropic announced its XTR-0 research platform and described thermodynamic sampling units on 29 October 2025, building probabilistic bits from transistors that fluctuate between 0 and 1 with programmable probabilities, and Normal Computing was reported on 13 August 2025 to have taped out its CN101 thermodynamic chip for data centres. The conclusion is that the idea has moved from papers to silicon, although both companies are at prototype stage.

The efficiency claim is large but simulated. Extropic states that denoising thermodynamic models on its chips could be about 10,000 times more energy efficient than algorithms on GPUs, based on simulations of production scale units on small generative benchmarks, and the claim is not validated at scale. The conclusion is that energy is the reason for interest, since AI power demand is a top concern, and measured results from larger chips will decide whether the claim holds.

Public money has started to flow. The US Department of Commerce published a letter of intent on 29 July 2026 for up to 75 million dollars of research incentives for Extropic, part of a group of seven companies with a combined ceiling of 874 million dollars, with a minority non-controlling equity stake as a condition and final award subject to due diligence. The conclusion is that government sees probabilistic hardware as a strategic option for domestic chip production, although the amount is a ceiling tied to milestones and not cash received.

Research is scaling in parallel. A team from the University of California Santa Barbara, Carnegie Mellon University, King Fahd University of Petroleum and Minerals and Siemens Digital Industries Software linked FPGAs into a programmable machine with one million p-bits in a paper submitted on 24 June 2026, solved a 20,000 node Max-Cut instance to the certified optimum and measured 1.4 to 1.6 kilowatts for the largest system. The conclusion is that probabilistic machines can reach useful sizes with existing chips, while the paper does not claim a wall clock speedup over GPUs.

The brief treats probabilistic computing as an emerging signal with a ten year horizon to 2036. It identifies which chipmakers, cloud providers and research groups capture value if sampling and optimisation become standard workloads for dedicated hardware. It is a focused 103-page decision brief that presents an indicative trajectory rather than a segmented market model.

Randomness becomes the computing element. A probabilistic bit fluctuates between 0 and 1 with a probability that the circuit can set, and a network of such bits samples from a distribution that encodes a problem. The conclusion is that the hardware draws answers directly from physics instead of calculating them with many multiplications, which suits sampling and search tasks.

Ising machines solve optimisation problems. Coherent Ising machines use networks of optical oscillators, digital annealers and quantum-inspired solvers such as Toshiba SQBM+ run the same type of problem on electronics, and the problem is mapped to an Ising model of interacting spins. NTT Research and Tohoku University reported on 9 July 2025 that a single-photon coherent Ising machine found exact solutions with higher probability than a conventional one across more than 100 simulated instances. The conclusion is that several physical routes target the same class of problems, and none has yet shown a clear and general advantage over strong classical solvers.

Thermodynamic chips target AI. Extropic builds arrays of probabilistic cores that sample energy-based models by Gibbs sampling with local communication, and its denoising thermodynamic model is a diffusion-inspired generative design made for such chips. The conclusion is that the near-term pitch is energy efficient generative AI and sampling, a market that depends on algorithms that run well on the hardware.

Scale depends on conventional chips today. The one million p-bit machine used 18 FPGAs on an AMD based platform, and the authors synthesised but did not fabricate a 7 nanometre chip partition of 8,442 p-bits at 248 milliwatts. The conclusion is that dedicated silicon would raise density and cut power, but it is not yet built, and FPGA systems set the performance baseline.

The limits are the lack of a clear advantage over strong GPU and classical solvers, an immature software stack and results that are simulated or on small problems. The brief tests each limit against the evidence to 2036.

The probabilistic computing market, covering hardware, cloud access and software for Ising machines, digital and quantum-inspired annealers, probabilistic bit systems and thermodynamic sampling chips that solve sampling and optimisation problems, and excluding gate-based quantum computers, general purpose GPUs and CPUs and academic research funding, is valued at USD 0.05–0.10 billion in 2026 and is projected to reach USD 1.45–2.89 billion by 2036, at a CAGR of 40%.

The 2026 base rests on cloud access to annealers and quantum-inspired solvers, sales of Ising and sampling hardware to research and industry users and prototype hardware sold to early partners. Growth then follows the number of workloads that show a clear advantage in speed or energy, the maturity of software and the availability of production silicon.

The forecast is sensitive to measured results from the first production scale chips, the algorithms that run on them and the pace of government and customer funding.

The base case assumes measured advantages on a few workloads and production silicon around 2031, bringing the inflection to about 2032 and a 2036 value near the middle of the range. An accelerated case assumes confirmed energy savings at scale for generative sampling and strong public funding, moving the inflection to 2030 and lifting the 2036 value to the top of the range. A delayed case assumes that the efficiency claims do not hold on measured silicon and that GPUs and classical solvers keep improving, moving the inflection to 2035 and holding growth at the bottom of the range.

Growth drivers

• Energy cost and power limits of AI data centres.
• Hard optimisation problems in logistics, finance and design.
• Public funding for domestic chip innovation.
• Progress in p-bit and Ising machine research.

Enablers

• Mixed-signal chip design and standard CMOS manufacturing.
• FPGA platforms for building large systems.
• Cloud access to annealers and solvers.
• Open source libraries for probabilistic hardware.

Restraints and barriers

• Lack of a clear advantage over GPUs and classical solvers.
• Immature software and algorithms.
• Simulated results and small benchmarks.
• Limited manufacturing scale for dedicated chips.

The direction of probabilistic computing is set by the energy cost of AI computing, the value of hard optimisation problems, public funding for domestic chips, progress in p-bit and Ising machine research and the readiness of customers to adopt a new class of accelerator.

The key participants in probabilistic computing and hardware built for uncertainty include Nippon Telegraph and Telephone Corporation, Toshiba Corporation, Fujitsu Limited, Hitachi, Ltd., NEC Corporation, Microsoft Corporation, International Business Machines Corporation, D-Wave Quantum Inc., NVIDIA Corporation, Advanced Micro Devices, Inc., Siemens Aktiengesellschaft, Intel Corporation, Taiwan Semiconductor Manufacturing Company Limited, Alphabet Inc., Amazon Web Services, Inc., Qualcomm Incorporated, Synopsys, Inc., Cadence Design Systems, Inc., Samsung Electronics Co., Ltd., GlobalFoundries Inc., Extropic, Normal Computing, Fixstars Corporation, Hewlett Packard Enterprise Company, Dell Technologies Inc., Oracle Corporation, Lockheed Martin Corporation, JPMorgan Chase & Co., Mitsubishi Electric Corporation, Denso Corporation, NTT Research, Inc., Tohoku University, the University of California, Santa Barbara, Carnegie Mellon University, King Fahd University of Petroleum and Minerals, Purdue University, Stanford University, the Massachusetts Institute of Technology, the United States Department of Commerce and the Defense Advanced Research Projects Agency.

The brief profiles representative participants in each archetype and assesses which are positioned to lead if probabilistic hardware becomes a standard accelerator class.

Nippon Telegraph and Telephone Corporation, Toshiba Corporation and Fujitsu Limited lead among established Ising machine and annealer providers, Extropic and Normal Computing lead among start-ups building thermodynamic sampling chips, and NVIDIA Corporation and Advanced Micro Devices, Inc. lead among incumbents whose GPUs and FPGAs set the performance baseline. Competitive intensity is low today but will rise as production silicon arrives and incumbents respond.

Where value migrates.

In 2026 value sits with established Ising machine providers and cloud access to solvers, while start-ups sell prototypes and research platforms. By 2032 it moves toward chipmakers and foundries that produce dedicated probabilistic silicon and toward cloud providers that offer it with software, because users want results in existing workflows. By 2036 it settles with the suppliers whose hardware shows measured advantages in energy or speed on valuable workloads, where software, algorithms and manufacturing scale carry the margin. Margins hold for suppliers with proven results and software ecosystems, and narrow for suppliers whose advantage over GPUs and classical solvers is not confirmed.

Prototype chips from two start-ups, public funding, a one million p-bit machine and the energy demands of AI computing support growth, while the lack of a clear advantage over GPUs and classical solvers, immature software and simulated results hold back the pace.

Measured results on larger chips, a strong improvement in GPU or classical solvers, or a change in public funding could shift the pace. The brief therefore tracks four indicators: measured energy and speed on benchmark workloads, the number of customers in paid pilots, the size of p-bit systems and the amount of public and private funding.

Prototypes and pilots first, then production silicon and cloud access, then probabilistic accelerators as a standard class beside GPUs is the expected order of change.